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tsm921 - tsm924 page 1 ? 2012 touchstone semiconductor, inc. all rights reserved. features ? ultra - low quiescent current over temp erature tsm 921 /tsm922: 4a (total) tsm923/tsm924: <2.5a per comparator ? single or dual power supplies: single : +2.5v to +11v dual : 1.25v to 5.5v ? input voltage range includes negative supply ? 12s propagation delay at 10mv overdrive ? push - pull ttl/cmos - compatible outputs ? crowbar - current - free switching ? continuous source current capability: 40ma ? internal 1.182v 1% reference : tsm921/tsm923/tsm924 ? adjustable hysteresis : tsm921/tsm923 applications threshold detectors window comparator level translators oscillator circuits battery - powered systems description the tsm 921 C tsm 924 family of single/ dual / quad, low - voltage , micropower analog comparators is electrically and form - factor identical to the max921 - max924 family of analog comparators. ideal for 3v or 5v single - supply applications, the tsm 921 C tsm 924 family can operate from single +2.5v to +11v supplies or from 1.25v to 5 .5 v dual supplies. the single tsm921 and the dual tsm922 draw less than 4a (max) supply current over temperature . the dual tsm923 and the quad tsm924 draw less than 2.5 a per comparator over temperature. all comparators in this family exhibit an in put voltage range from the negative supply rail to within 1.3v of the positive supply. in addition, the comparators push - pull output stages are ttl/cmos compatible and capable of sinking and sourcing current. the tsm921/tsm923/tsm924 each incorporates an internal 1.182v 1% voltage reference . without complicated feedback configurations and only requiring two additional resistors, adding external hysteresis via a separate pin is available on the single tsm921 and the dual tsm923. ultra - low - power, single/dual - supply comparators typical application circuit a 5v, low - parts - count window detector part internal reference comparators per package internal hysteresis tsm92 1 yes 1 yes tsm92 2 no 2 no tsm92 3 yes 2 yes tsm924 yes 4 no part temperature range package tsm92 1 c 0oc to 70oc 8 - pin msop/soic tsm92 1 e - 40oc to 85oc tsm92 2 c 0oc to 70oc 8 - pin msop/soic tsm92 2 e - 40oc to 85oc tsm92 3 c 0oc to 70oc 8 - pin msop/soic tsm92 3 e - 40oc to 85oc tsm924c 0oc to 70oc 16 - pin soic tsm924e - 40oc to 85oc t he touchstone semicondu c tor logo is a registered trademark of touchstone semiconductor, incorporated.
tsm921 - tsm924 page 2 tsm921_24ds r1p0 rtfds absolute maximum ratings supply voltage ( v+ to v - , v+ to gnd, gnd to v - )... ... - 0.3v, +12v voltage inputs (in+, in - ) ... .......................... .......... . ..... . ( v+ + 0.3v) to (v - - 0.3v) hyst.(ref + 5 v) to (v - - 0.3v) output voltage ref ............................ ................... . ..... (v+ + 0.3v) to (v - - 0.3v) out ( tsm92 1/24 ).......... .... .............( v+ + 0.3v ) to (gnd - 0.3v) out ( tsm922/23 ) .......... ..... ............. ...( v+ + 0.3v ) to (v - - 0.3v) input current (in+, in - , hyst ). ............. . ..... ....... ....... . ...........20ma output current continuous power dissipation (t a = +70c) 8 - pin msop (d erate 4.1 mw/c above +70c) ... .. ....... . .. ..330 mw 8 - pin so ic (derate 5.88 mw/c above +70c)............ ......471 mw 16 - pin so ic (8.7 mw/c above +70c) ...... ......................696 mw operating temperature range tsm92xc.......................... .... . ............................ .......0c to +70 c tsm92xe .................... . ..... .... . ................. ......... .... . . - 40c to +85c storage temperature range ........................ ..... . . .. - 65c to +150c lead temperature (soldering, 10s) ..................... . ..... ...........+300c ref .20ma out... .50ma output short - circuit duration (v+ 5.5v) ...... ........ .. continuous electrical and thermal s tresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. exposure to any absolute maximum rating conditions for extended periods may affect device r eliability and lifetime . package/ordering information order number part marking carrier quantity order number part marking carrier quantity tsm921cua+ tadk tube 50 TSM921CSA+ ts921 tube 97 TSM921CSA+t tape & reel 2500 tsm921cua+t tape & reel 2500 tsm921esa+ ts921e tube 97 tsm921esa+t tape & reel 2500
tsm921 - tsm924 tsm921_24ds r1p0 page 3 rtfds package/ordering information order number part marking carrier quantity order number part marking carrier quantity tsm922cua+ tabc tube 50 tsm922csa+ ts922 tube 97 tsm922csa+t tape & reel 2500 tsm922cua+t tape & reel 2500 tsm922esa+ ts922e tube 97 tsm922esa+t tape & reel 2500 order number part marking carrier quantity order number part marking carrier quantity tsm923cua+ tab a tube 50 tsm923csa+ ts923 tube 97 tsm923csa+t tape & reel 2500 tsm923cua+t tape & reel 2500 tsm923esa+ ts923 e tube 97 tsm923esa+t tape & reel 2500
tsm921 - tsm924 page 4 tsm921_24ds r1p0 rtfds package/ordering information order number part marking carrier quantity order number part marking carrier quantity tsm924cse+ ts924 tube 48 tsm924ese+ ts924e tube 48 tsm924cse+t tape & reel 2500 tsm924ese+t tape & reel 2500 lead - free program: touchstone semico nductor supplies only lead - free packaging. consult touchstone semiconductor for products specified with wider operating temperature ranges.
tsm921 - tsm924 tsm921_24ds r1p0 page 5 rtfds electrical characteristics C 5v operation v+ = 5v, v - = gnd = 0v; t a = - 40oc to +85oc, unless otherwise noted. typical values are at t a = +25oc. see note 1. parameter conditions min typ max units power requirements supply voltage range see note 2 2.5 11 v supply current in+ = in - + 100mv tsm92 1; hyst = ref t a = +25c 2.5 3.2 a a = - 40c to +85c 4 tsm92 2 t a = +25c 2.5 3.2 t a = - 40c to +85c 4 tsm923 hyst = ref t a = +25c 3.1 4.5 t a = - 40c to +85c 6 tsm92 4 t a = +25c 5.5 6.5 t a = - 40c to +85c 8.5 comparator input offset voltage v cm = 2.5v 10 mv input leakage current (in - , in+) in+ = in - = 2.5v t a = - 40c to +85c 0.01 5 na input leakage current (hyst) tsm921, tsm92 3 0.02 na input common - mode voltage range v - v+ C C v rms hysteresis input voltage range tsm921, tsm92 3 ref - 0.05v ref v response time t a = +25c; 100pf load overdrive = 10 mv 12 s a = - 40c to +85c : i out = 17 ma v+ C a = - 40c to +85c : i out = 1.8 ma v - + 0.4 v tsm921, tsm924 t a = - 40c to +85c : i out = 1.8 ma gnd + 0.4 v reference reference voltage t a = 0 c to + 70 c 1.170 1.182 1.194 v t a = - 40c to +85c 1.158 1.206 v source current t a = +25c 15 25 a a = - 40c to +85c 6 sink current t a = +25c 8 15 a a = - 40c to +85c 4 voltage noise 100hz to 100khz 100 v rms
tsm921 - tsm924 page 6 tsm921_24ds r1p0 rtfds electrical characteristics C 3v operation v+ = 3v, v - = gnd = 0v ; t a = - 40oc to +85oc, unless otherwise noted. typical values are at t a = +25oc. see note 1. parameter conditions min typ max units power requirements supply current in+ = in - + 100mv tsm921; hyst = ref t a = +25c 2.4 3.0 a a = - 40c to +85c 3.8 tsm922 t a = +25c 2.4 3.0 t a = - 40c to +85c 3.8 tsm923 hyst = ref t a = +25c 3.4 4.3 t a = - 40c to +85c 6 tsm92 4 t a = +25c 5.2 6.2 t a = - 40c to +85c 8.0 comparator input offset voltage v cm = 1 .5v 10 mv input leakage current (in - , in+) in+ = in - = 1 .5v t a = - 40c to +85c 0.01 5 na input leakage current (hyst) tsm921, tsm92 3 0.02 na input common - mode voltage range v - v+ C C v rms hysteresis input voltage range tsm921, tsm92 3 ref - 0.05v ref v response time t a = +25c; 100pf load overdrive = 10 mv 14 s a = - 40c to +85c : i out = 10 ma v+ C a = - 40c to +85c : i out = 0.8 ma v - + 0.4 v tsm921, tsm924 t a = - 40c to +85c : i out = 0 .8 ma gnd + 0.4 v reference reference voltage t a = 0 c to + 70 c 1.170 1.182 1.194 v t a = - 40c to +85c 1.158 1.206 v source current t a = +25c 15 25 a a = - 40c to +85c 6 sink current t a = +25c 8 15 a a = - 40c to +85c 4 voltage noise 100hz to 100khz 100 v rms note 1 : all specifications are 100% tested at t a = +25c. specification limits over temperature (t a = t min to t max ) are guaranteed by device characterization, not production tested. note 2: the tsm924 comparator operates below 2.5v . refer to the low - voltage operation: v+ = 1 .5 v (tsm924 only) section .
tsm921 - tsm924 tsm921_24ds r1p0 page 7 rtfds typical performance characteristics v + = 5v; v - = gnd ; t a = +25c , unless otherwise noted. load current - ma v ol - v 4 8 1 0 output voltage low vs load current 0 12 1.5 2 0.5 16 load current - a reference voltage - v 5 10 1.165 1.155 1.180 reference output voltage vs output load current 0 15 1.170 1.175 1.160 20 temperature - oc reference voltage - v reference voltage vs temperature load current - ma v oh - v 10 20 2 1.5 output voltage high vs load current 0 30 2.5 40 50 3 3.5 v+ = 3v v+ = 5v sink temperature - oc supply current - a 2.5 1.5 tsm921 supply current vs temperature 3 3.5 2 temperature - oc supply current - a tsm922 supply current vs temperature in+ = in - + 100mv 20 2.5 4 4.5 5 v+ = 3v v+ = 5v 25 30 1.190 1.185 source v+ = 3v or 5v - 15 10 - 40 35 60 85 1.16 1.14 1.19 1.17 1.18 1.15 1.21 1.20 1.22 - 15 10 - 40 35 60 85 4 v+ = 5v, v - = - 5v v+ = 5v, v - = 0v v+ = 3v, v - = 0v - 15 10 - 40 35 60 85 in+ = in - + 100mv v+ = 10v, v - = 0v v+ = 5v, v - = 0v v+ = 3v, v - = 0v 24 28 4.5 2.5 1.5 3 3.5 2 4 4.5
tsm921 - tsm924 page 8 tsm921_24ds r1p0 rtfds typical performance characteristics v + = 5v; v - = gnd ; t a = +25c , unless otherwise noted. temperature - oc supply current - a tsm923 supply current vs temperature single - supply voltage - v supply current - a 2 1 tsm924 supply current vs low supply voltages 1.5 2.5 10 0.1 v ref - v hyst - mv in+ - in - - mv - 40 - 80 hysteresis control - 20 0 - 60 10 20 0 30 40 temperature - oc supply current - a - 15 10 tsm924 supply current vs temperature - 40 35 60 85 output high load capacitance - nf response time - s response time vs load capacitance 20 40 0 60 80 v - = 0v - 15 10 - 40 35 60 85 3 2 3.5 4 2.5 4.5 5 v+ = 5v, v - = 0v v+ = 3v, v - = 0v 5 3 6 7 4 8 9 10 in+ = in - + 100mv v+ = 5v, v - = - 5v v+ = 5v, v - = 0v v+ = 3v, v - = 0v 50 60 20 80 40 output low no change 100 6 2 8 10 4 12 14 16 18 v ohl v olh in+ input voltage - mv output voltage - v - 0.3 - 0.2 1 0 transfer function - 0.4 0 3 4 2 0.1 0.2 0.3 5 - 0.1 0.4
tsm921 - tsm924 tsm921_24ds r1p0 page 9 rtfds typical performance characte ristics v + = 5v; v - = gnd ; t a = +25c , unless otherwise noted. response time - s output voltage - v 0 2 0 0 response time for various input overdrives (low - to - high) - 2 4 1 2 100 0 6 single - supply voltage - v response time - s 1.5 2 10 tsm924 response time at low supply voltages (low - to - high) 2.5 100 1 single - supply voltage - v current - ma 10 tsm924 source and sink current at low supply voltages 100 1 response time - s response time for various input overdrives (high - to - low) 10mv 20mv 50mv 20mv overdrive source current into 0.75v load total supply voltage - v source current - ma 2.5 3 short - circuit source current vs supply voltage 2 3.5 4 input voltage - v output voltage - v input voltage - v 8 5 3 4 100mv 10mv 20mv 50mv 100mv 100mv overdrive 1.5 2 2.5 80 0 120 160 40 200 out connected to v - sink current at v out = 0.4v 10 12 14 16 18 20 0 0 1 2 100 5 3 4 0 2 - 2 4 6 8 10 12 14 16 18 4.5 5 5.5 total supply voltage - v sink current - ma 22 16 short - circuit sink current vs supply voltage 18 4 6 2 gnd connected to v - out connected to v+ 8 10 20 24
tsm921 - tsm924 page 10 tsm921_24ds r1p0 rtfds pin functions pin name function tsm921 tsm922 tsm923 1 gnd ground. connect to v - for single - supply operation. output swings from v+ to gnd. 1 1 outa comparator a output. sinks and sources current. swings from v+ to v - . 2 2 2 v - negative supply voltage . connect to ground for single - supply operation. 3 in+ comparator noninverting input 3 3 ina+ comparator a noninverting input 4 in - comparator inverting input 4 ina - comparator a inverting input 5 4 inb - comparator b inverting input 5 5 hyst hysteresis input. connect to ref if not used. input voltage range is from v ref to (v ref - 50mv). 6 6 ref 1.182v reference output with respect to v - . 6 inb+ comparator b noninverting input 7 7 7 v+ positive supply voltage 8 out comparator output. sinks and sources current. swings from v+ to gnd. 8 8 outb comparator b output. sinks and sources current. swings from v+ to v - . pin name function tsm92 4 1 outb comparator b output. sinks and sourc es current. swings from v+ to gnd . 2 outa comparator a output. sinks and sourc es current. swings from v+ to gnd . 3 v+ positive supply voltage 4 ina - comparator a inverting input 5 ina+ comparator a noninverting input 6 inb - comparator b inverting input 7 inb+ comparator b noninverting input 8 ref 1.182v reference output with respect to v - . 9 v - negative supply voltage . connect to ground for single - supply operation. 10 inc - comparator c inverting input 11 inc+ comparator c noninverting input 12 ind - comparator d inverting input 13 ind+ comparator d noninverting input 14 gnd ground. connect to v - for single - supply operation. 15 outd comparator d output. sinks and sources current. swings from v+ to gnd . 16 outc comparator c output. sinks and sourc es current. swings from v+ to gnd .
tsm921 - tsm924 tsm921_24ds r1p0 page 11 rtfds block diagrams
tsm921 - tsm924 page 12 tsm921_24ds r1p0 rtfds theory of operation the tsm 921 C tsm 924 family of single/ dual / quad, low - voltage , micropower analog comparators provide excellent flexibility and performance while sourcing continuously up to 40ma of current. the tsm921, tsm923 , and the tsm924 provide an on - board 1.182v 1% reference voltage. to minimize glitches that can oc cur with parasitic feedback or due to less than optimal board layout, the design of the tsm921 - tsm924 output stage is optimized to eliminate crowbar glitches as the output switches. to minimize current consumption while providing flexibility, the tsm921 and the tsm923 have an on - board hyst pin in order to add additional hysteresis. power - supply and input signal ranges the tsm921 - tsm924 can operate from a single supply voltage range of +2.5v to +11v, provide a wide common mode input voltage range of v - to v+ - 1.3v, and accept input signals ranging from v - to v+ - 1v. the inputs can accept an input as much as 300mv above and below the power supply rails without damage to the part. while the tsm921 and the tsm924 are able to operate from a single supply voltage range, a gnd pin is available that allows for a dual supply operation with a range of 1.25v to 5.5v . if a single su pply operation is desired, the gnd pin needs to be tied to v - . in a dual supply mode, the tsm921 and the tsm924 are ttl/cmos compatible with a 5v voltage and the tsm922 and the tsm923 are ttl compatible with a single +5v supply. low - v oltage operation: v + = 1 .5 v (tsm92 4 only) due to a decrease in propagation delay and a reduction in output drive, the tsm921 - tsm923 cannot be used with a supply voltage much lower than 2.5v. however, the tsm924 can operate down to a supply voltage of 2v; however, as the sup ply voltage reduces, the tsm924 supply current drops and the performance is degraded. when the supply voltage drops to 2.2v, the reference voltage will no longer function ; however, the comparators will function down to a 1 .5 v supply voltage. furthermore, the input voltage range is extended to just below 1 .5 v the positive supply rail. for applications with a sub - 2.5v power supply, it is recommended to evaluate the circuit over the entire power supply range and temperature. comparator output the tsm921 and the tsm924 have a gnd pin that allows the output to swing from v+ to gnd while the v - pin can be set to a voltage below gnd as long as the voltage difference between v+ and v - is within 11v. having a different voltage on v - will not affect the output swing. for ttl applications , v+ can be set to +5v 10% and v - can be set anywhere between 0v and - 5v 10% . on the other hand, the tsm922 and the tsm923 do not have a gnd pin; hence, for ttl applications, v+ needs to be set to a +5v power supply an d v - to 0v. furthermore, the output design of the tsm921 - tsm924 can source and sink more than 40ma and 5ma, respectively, while simultaneously maintaining a quiescent current in the microampere range. if the power dissipation of the package is maintained w ithin the max limit, the output can source pulses of 100ma of current with v+ set to +5v. in an effort to minimize external component count needed to address power supply feedback, the tsm921 - tsm924 output does not produce crowbar switching current as the o utput switches. with a 1 0mv input overdrive, the propagation delay of the tsm921 - tsm924 is 12 s . voltage reference the tsm921, tsm923 , and tsm924 have an on - board 1.182v reference voltage with an accuracy of 1%. the ref pin is able to source and sink 15a and 8a of current, respectively. the ref pin is referenced to v - and it should not be bypassed. noise considerations noise can play a role in the overall performance of the tsm921 - tsm924. despite having a large gain, if the input voltage is near or equal to the input offset voltage, the output will randomly switch high and low. as a result, the tsm921 - tsm924 produces a peak - to - peak noise of a pproximately 0.3mv pp while the reference voltage produces a peak - t o - peak noise of a pproximately 1mv pp . furthermore, it is important to design a layout that minimizes capacitive coupling from a given output to the reference pin as crosstalk can add noise and , as a result, degrade performance.
tsm921 - tsm924 tsm921_24ds r1p0 page 13 rtfds applications information hysteresis as a result of circuit noise or unintended parasitic feedback, many analog comparators often break into oscillation within their linear region of operation especially when the applied differential input voltage approaches 0v (zero volt). externally - introduced hysteresis is a well - established technique to stabilizing analog comparator behavior and requires external components. as shown in figure 1 , adding comp arator hysteresis creates two trip points: v thr (for the rising input voltage) and v thf (for the falling input voltage). the hysteresis band (v hb ) is defined as the voltage difference between the two trip points. when a comparators input voltages are equa l, hysteresis effectively forces one comparator input to move quickly past the other input, moving the input out of the region where oscillation occurs. figure 2 illustrates the case i n which an in - input is a fixed voltage and an in+ is varied. if the input signals were reversed, the figure would be the same with an inverted output. hysteresis (tsm921 and tsm9 23 ) hysteresis can be generated with two external resistors using positive feedback as shown in figure 2 . resistor r1 is connected between ref and hyst and r2 is connected between hyst and v - . this will increase the trip point for the rising input voltage, v thr , and decrease the trip point for the falling input voltage, v thf , by the same amount. if n o hysteres is is required, connect the hyst pin to the ref pin . the hysteresis band, v hb , is voltage across the ref and hyst pin multiplied by a factor of 2. the hyst pin can accept a voltage between ref and ref - 50mv, where a voltage of ref - 50mv generates t he maximum voltage across r1 and thus, the maximum hysteresis and hysteresis band of 50mv and 100mv, respectively. to design the circuit for a desired hysteresis band, consider the equations below to acquire the values for resistors r1 and r2: r 1 v h 2 x i ref r 2 1 . 182 v h 2 i ref where i ref is the primary source of current out of the reference pin and should be maintained within the maximum current the reference can source . this is typically in the range of 0.1a and 4a. it is also important to ensure that the current from reference is much larger than the hyst pin input current. given r2 = 2.4 m , the current sourced by the reference is 0.5a . this allows the hysteresis band and r1 to be approximated as f ollows: r1(k) v hb (mv) for the tsm923, the hysteresis is the same for both comparators. hysteresis (tsm922 and tsm92 4) relative to adding hysteresis with the hyst pin as was done for the tsm921 and the tsm923, the circuit in figure 3 uses positive feedback along with two external resistors to set the desired hysteresis for the tsm924 . the circuit consumes more current and it slows down the hysteresis effect due to the figure 1. threshold hysteresis band figure 2. programming the hyst pin
tsm921 - tsm924 page 14 tsm921_24ds r1p0 rtfds high impedance on the feedback. the following procedure explains th e steps to design the circuit for a desired hysteresis: 1. choose r3. as the leakage current at the in+ pin is less than 1na, the current through r3 should be at least 100na to minimize offset voltage errors caused by the input leakage current. for r3 11.8m, the current through r3 is v ref /r3 at the trip point. in this case, a 10m resistor is a good standard value for r3. 2. next , the desired hysteresis band ( v h b ) is set. in this exampl e, v h b is set to 50mv. 3. calculate r1. r 1 r 3 x v h v + 10 m x 50 mv 5 v 100 k in this example, a 100k, 1% standard value resistor is selected for r1. 4. choose the trip point for v in rising (v thr ) , which is the threshold voltage at which the comparator switches its output from low to high as v in rises above the trip point . in this example, choose v thr = 3v. 5. calculate r2. r 2 1 v thr v ref x r 1 1 r 1 1 r 3 1 3 1 . 182 v x 100 k 1 100 k 1 10 m 5 . 44 k in this example, a 4.9k, 1% standard value resistor is selected for r2. 6. the last step is to verify the trip voltages and hysteresis band using the standard resistance values : v thr v ref x r 1 x 1 r 1 + 1 r 2 + 1 r 3 v thf v thr C r 1 x v + r 3 board layout and bypassing while power - s upply bypass capacitors are not typically required, it is good engineering practice to use 0.1f bypass capacitors close to the devices power su pply pins when the power supply impedance is high, t he power supply leads are long, or there is exce ssive noise on the power supply traces. to reduce str ay capacitance, it is also good engineering practice to make signal trace lengths as short as possible . also recommended are a ground plane and surface mount resistors and capacitors. typical application circuits auto - off power source a timed auto power - off circuit can be designed as shown in figure 4 where t he outp ut of the tsm921 is the switched power - supply output. with an internal reference, hysteresis, high current output, and a 2.5 a supply current, the tsm921 provides a wealth of features that make it perfect for this application. while consuming only 3.5 a of quiescent current with a 10ma load, the tsm921 is able to generate a voltage o f vbatt C 0.12v. as shown in f igure 4 , three resistors are used to generate a hysteresis band of 100mv and sets the in+ trip point to 50 mv when in+ is going low . the maximum power - on period of the out pin before power - down occurs can be determined by t he rc time constant as follows: figure 3. external hysteresis
tsm921 - tsm924 tsm921_24ds r1p0 page 15 rtfds r x c 4 . s the period value will change depending on the leakage current and the voltage applied to the circuit. for instance : 2m x 10f x 4. s = 92 s . window detector the schematic shown in figure 5 is for a 4.5v undervoltage threshold detector and a 5.5v overvoltage threshold detector using the tsm923. resistor components r1, r2, and r3 can be selected based on the threshold voltage desired while resistors r4 and r5 can b e selected based on the hysteresis desired. adding hysteresis to the circuit will minimize chattering on the output when the input voltage is close to the trip point. outa and outb generate the active low undervoltage indication and active - low overvoltage indication, respectively. if both outa and outb signals are anded together, the resulting output of the and gate is an active - high, power - good signal. to design the circuit, the following procedure needs to be followed : 1. as described in the section hysteresis ( tsm921 and tsm923) , determine the desired hysteresis and select resistors r4 and r5 accordingly. this circuit has 5mv of hysteresis at the input where the input voltage v in will appear larger due to the input resistor divider. 2. selecting r1. as the leakage current at the inb - pin is less than 1na, the current through r1 should be at least 100na to minimize offset voltage errors caused by the input leakage current. values within 100k and 1m are recommended. in this exa mple, a 294 k, 1% standard v alue resistor is selected for r1 . 3. calculating r2 + r3. as the input voltage v in rises, the overvoltage threshold should be 5.5v. choose r2 + r3 as follows: r 2 + r 3 r 1 x v oth v ref + v hys 1 294 k x 5 . 5 v 1 . 182 v + 5 mv 1 1 . 0 8 m 4. calculating r2. as the input voltage v in falls, the under voltage threshold should be 4 .5v. choose r2 as follows: r 2 ( r 1 + r 2 + r 3 ) x v ref v hys v uth 294 k ( 294 k + 1 . 0 8 m ) x 1 . 182 v 5 mv 4 . 5 294 k 2 . 2 k in this example, a 1.9k, 1% standard value resistor is selected for r2. 5. calculating r3. r 3 ( r 2 + r 3 ) r 2 1 . 0 8 m C 1 . 9 k 1 . 00 m figure 5. window detector figure 4. auto - off power switch operates on 2.5 a quiescent current.
tsm921 - tsm924 page 16 tsm921_24ds r1p0 rtfds figure 6. bar - graph level gauge in this example, a 1m, 1% standard value resistor is selected for r3. 6. using the equations below, verify all resistor values selected: v oth ( v ref + v hys ) x r 1 + r 2 + r 3 r 1 = 5.474v v oth ( v ref v hys ) x r 1 + r 2 + r 3 ( r 1 + r 2 ) 4 . 484 v where the hysteresis voltage is given by: v hys v ref x r 5 r 4 bar - graph level gauge a simple four - stage le vel detector is shown in figure 6 using the tsm924 . due to its high output source capability, the tsm921 is perfect for driving leds. when all of the leds are on, the threshold voltage is set by resistors r1 and r2 where v in = ( r1 + r2)/r1 volts. all other threshold voltages are scaled down accordingly by ?, ?, and ? the threshold voltage. the current through the leds is limited by the output resistors . level shifter figure 7 pr ovides a simple way to shift from bipolar 5v inputs to ttl signals by using the tsm924 . to protect the comparator inputs, 10k resistors are placed in series and do not have an effect on the performance of the circuit. figure 7. level shifter: 5v input into cmos output
tsm921 - tsm924 tsm921_24ds r1p0 page 17 rtfds package outline draw ing 8 - pin soic package outline drawing (n.b., drawings are not to scale) 1 . 2 7 t y p 0 . 3 3 - 0 . 5 1 4 . 8 0 - 5 . 0 0 3 . 7 3 - 3 . 8 9 0 - 8 3 . 8 1 C 3 . 9 9 1 2 2 n o t e s : d o e s n o t i n c l u d e m o l d f l a s h , p r o t r u s i o n s o r g a t e b u r n s . m o l d f l a s h , p r o t r u s i o n s o r g a t e b u r r s s h a l l n o t e x c e e d 0 . 1 5 m m p e r s i d e . d o e s n o t i n c l u d e i n t e r - l e a d f l a s h o r p r o t r u s i o n s . i n t e r - l e a d f l a s h o r p r o t r u s i o n s s h a l l n o t e x c e e d 0 . 2 5 m m p e r s i d e . l e a d s p a n / s t a n d o f f h e i g h t / c o p l a n a r i t y a r e c o n s i d e r e d a s s p e c i a l c h a r a c t e r i s t i c ( s ) . c o n t r o l l i n g d i m e n s i o n s a r e i n m m . t h i s p a r t i s c o m p l i a n t w i t h j e d e c s p e c i f i c a t i o n m s - 0 1 2 l e a d s p a n / s t a n d o f f h e i g h t / c o p l a n a r i t y a r e c o n s i d e r e d a s s p e c i a l c h a r a c t e r i s t i c . 1 2 l e a d f a r m e t h i c k n e s s 0 . 1 9 C 0 . 2 5 5 . 8 0 C 6 . 2 0 0 . 1 0 C 0 . 2 5 1 . 7 5 m a x 0 . 1 0 m a x 7 ' r e f a l l s i d e 7 ' r e f a l l s i d e 0 . 7 6 m a x 0 . 6 6 m i n 0 . 4 0 6 C 0 . 8 6 3 0 . 5 4 6 r e f 0 . 4 8 m a x 0 . 2 8 m i n 4 5 ' a n g l e 0 . 2 5 5 . 6 . 1 . 3 2 C 1 . 5 2 g a u g e p l a n e 3 . 4 .
tsm921 - tsm924 page 18 tsm921_24ds r1p0 rtfds package outline draw ing 8 - pin msop package outline drawing (n.b., drawings are not to scale) 0 . 6 5 r e f 3 . 1 0 m a x 2 . 9 0 m i n 0 . 9 5 m a x 0 . 7 5 m i n 0 . 1 5 m a x 0 . 0 5 m i n s e a t i n g p l a n e 5 . 0 8 m a x 4 . 6 7 m i n 3 . 1 0 m a x 2 . 9 0 m i n 0 ' - - 6 ' d e t a i l a d e t a i l a 0 . 2 5 0 . 7 0 m a x 0 . 4 0 m i n 0 . 2 3 m a x 0 . 1 3 m i n n o t e : 1 . p a c k a g e l e n g t h d o e s n o t i n c l u d e m o l d f l a s h , p r o t r u s i o n s o r g a t e b u r r s . 2 . p a c k a g e w i d t h d o e s n o t i n c l u d e i n t e r l e a d f l a s h o r p r o t u s i o n s . 3 . c o n t r o l l i n g d i m e n s i o n i n m i l i m e t e r s . 4 . t h i s p a r t i s c o m p l i a n t w i t h j e d e c m o - 1 8 7 v a r i a t i o n s a a 5 . l e a d s p a n / s t a n d o f f h e i g h t / c o p l a n a r i t y a r e c o n s i d e r e d a s s p e c i a l c h a r a c t e r i s t i c . 1 2 8 0 . 3 8 m a x 0 . 2 8 m i n 0 . 1 0 m a x g a u g e p l a n e 1 . 1 0 m a x 0 . 2 7 r e f 0 . 1 2 7 0 . 2 3 m a x 0 . 1 3 m i n 0 . 3 8 m a x 0 . 2 8 m i n
tsm921 - tsm924 touchstone semiconductor, inc. page19 630 alder drive, milpitas, ca 95035 tsm921_24ds r1p0 +1 (408) 215 - 1220 ? www.touchstonesemi.com rtfds package outline draw ing 16 - pin soic package outline drawing (n.b., drawings are not to scale) information furnished by touchstone semiconductor is believed to be accurate and reliable. however, touchstone semiconductor does not assume any responsibility for its use nor for any infringements of patents or other rights of third parties that may result from its use , and all information provided by touchstone semiconductor and its suppliers is provided on an as is basis, without warranty of any kin d . touchstone semiconductor reserves the right to change produc t specifications and product descriptions at any time without any advance notice. no license is granted by implication or otherwise under any patent or patent rights of touchstone semiconductor. touchstone semiconductor assumes no liability for application s assistance or customer product design. customers are responsible for their products and applications using touchstone semiconductor components. to minimize the risk associated with customer products and applicatio ns, customers should provide adequate des ign and operating safeguards. trademarks and registered trademarks are the property of their respective owners. d e t a i l a 0 . 2 5 m a x 0 . 1 9 m i n n o t e : 1 . d d o e s n o t i n c l u d e m o l d f l a s h , p r o t r u s i o n s o r g a t e b u r r s . m o l d f l a s h , p r o t r u s i o n s o r g a t e b u r r s s h a l l n o t e x c e e d 0 . 1 5 m m p e r s i d e . 2 . e d o e s n o t i n c l u d e i n t e r - l e a d f l a s h o r p r o t r u s i o n s . i n t e r - l e a d f l a s h a n d p r o t r u s i o n s o r g a t e b u r r s s h a l l n o t e x c e e d 0 . 2 5 m m p e r s i d e . 3 . c o n t r o l l i n g d i m e n s i o n s i n m i l i m e t e r s a n d a n g l e s i n d e g r e e s . 4 . t h i s p a r t i s c o m p l i a n t w i t h j e d e c s p e c i f i c a t i o n m s - 0 1 2 a b 5 . l e a d s p a n / s t a n d o f f h e i g h t / c o p l a n a r i t y a r e c o n s i d e r e d a s s p e c i a l c h a r a c t e r i s t i c . d e t a i l a 0 . 5 1 m a x 0 . 3 3 m i n 0 . 2 5 m a x o . 1 0 m i n p i n 1 i d m a r k 1 0 . 0 1 m a x 9 . 8 0 m i n ( d ) 1 . 2 7 t y p 1 . 7 5 m a x g a u g e p l a n e 0 ' - 8 ' 0 . 8 6 3 m a x 0 . 4 0 6 m i n 6 . 2 0 m a x 5 . 8 0 m i n 3 . 9 9 m a x 3 . 8 1 m i n ( e ) 0 . 2 5 0 . 4 8 m a x 0 . 2 8 m i n 4 5 ' a n g l e 7 ' t y p a l l s i d e 0 . 1 0 m a x 3 . 8 9 m a x 3 . 7 3 m i n 3 . 9 9 m a x 3 . 8 1 m i n 0 . 7 9 m a x 0 . 6 9 m i n 0 . 5 0 8 r e f

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